The present inventive concept relates to a semiconductor device, and more particularly to a semiconductor device including fin type patterns. As one of scaling techniques for increasing the density of a semiconductor device, a gate all around structure in which a silicon body shaped of a nanowire is formed on a substrate and a gate is formed to surround the silicon body has been proposed.
Since the gate all around structure uses a three-dimensional channel, scaling is easily achieved. In addition, current controlling capability can be improved without increasing a length of the gate. Further, a short channel effect (SCE) in which a potential of a channel region is affected by drain voltage can be effectively suppressed.